Methods of forming fins for FinFET semiconductor devices and the selective removal of such fins
US9704973B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2014 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Jul 14, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0245
Abstract
One method includes forming a plurality of first trenches in a semiconductor substrate to thereby define a plurality of initial fins in the substrate, removing at least one, but less than all, of the plurality of initial fins, forming a fin protection layer on at least the sidewalls of the remaining initial fins, with the fin protection layer in position, performing an etching process to extend a depth of the first trenches to thereby define a plurality of final trenches with a final trench depth, wherein the final trenches define a plurality of final fin structures that each comprise an initial fin, removing the fin protection layer, and forming a recessed layer of insulating material in the final trenches, wherein the recessed layer of insulating material has a recessed surface that exposes a portion of the final fin structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.