Transistor with air spacer and self-aligned contact
US9721897B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2016 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Sep 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor transistor and the semiconductor transistor include a source region and a drain region within a substrate. The method includes forming a gate above the substrate, forming a source contact above the source region and a drain contact above the drain region, and forming air spacers within a dielectric between the gate and each of the source contact and the drain contact. Metal caps are formed on the source contact and the drain contact, and a gate cap is formed between the dielectric and at least a portion of a bottom surface of higher-level contacts, which are contacts formed above the source contact and the drain contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.