Semiconductor structure having gap fill dielectric layer disposed between fins
US9735154B2 · kind B2 · utility
9Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2015 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Oct 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide methods of removing fin portions from a finFET. At a starting point, a high-K dielectric layer is disposed on a substrate. A fin hardmask and lithography stack is deposited on the high-k dielectric. A fin hardmask is exposed, and a first portion of the fin hardmark is removed. The lithography stack is removed. A second portion of the fin hardmask is removed. Fins are formed. A gap fill dielectric is deposited and recessed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.