III-V HEMT devices
US9735260B2 · kind B2 · utility
1Cited by
12References
4Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 27, 2014 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Feb 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a stacked structure in which a p-GaN layer, an SI-GaN layer, and an AlGaN layer are stacked, and has a gate electrode that is formed at a top surface side of the AlGaN layer. A band gap of the AlGaN layer is wider than a band gap of the p-GaN layer and the SI-GaN layer. Moreover, impurity concentration of the SI-GaN layer is less than 1×1017 cm−3. Semiconductor devices including III-V semiconductors may have a stable normally-off operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.