Distributed history buffer flush and restore handling in a parallel slice design
US9740620B2 · kind B2 · utility
4Cited by
4References
13Claims
0Family size
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Key dates
| Filing date | May 7, 2015 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | May 7, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/62
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An approach is provided in which a computing system captures content included in a history buffer entry that corresponds to a flush ITAG. The computing system, in turn, uses an execution unit to transmit the content over a results bus to multiple registers and restore at least one of the registers accordingly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.