Patent · US Active

Memory circuitry using write assist voltage boost

US9741410B2 · kind B2 · utility

2Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 17, 2015
Grant dateAug 22, 2017
Priority date
Expiry dateSep 17, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/419
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Within a memory 2 comprising an array 4 of bit cells 6 write driver circuitry 14 uses a boosted write signal which is boosted to a lower than normal level during a write operation. Column select transistors 16 are driven by column select circuitry 12. The column select signal is boosted to a lower than normal level when a column is unselected and to higher than a normal level when a column is selected. Voltage boost circuitry, such as charge pumps 20, 22 are employed within the column select circuitry 12 to achieve these boosted levels for the columns select signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.