Patent · US Active

Middle of line cobalt interconnection

US9741609B1 · kind B1 · utility

15Cited by
5References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 1, 2016
Grant dateAug 22, 2017
Priority date
Expiry dateNov 1, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76885
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of fabricating features of a semiconductor device includes forming a contact over a substrate, the contact including a cobalt core and a liner layer arranged on sidewalls, wherein the contact includes a portion that is laterally surrounded by an interlevel dielectric (ILD); depositing another layer of ILD on the contact; etching a first opening in the ILD to expose a surface of the contact; removing the liner layer of the contact to expose a portion of the cobalt core; etching the ILD that laterally surrounds the contact to form a second opening beneath the first opening, the second opening having a width that is less than the first opening; depositing a liner on sidewalls of the first opening, the second opening, and directly on the cobalt core; and depositing a metal on the liner layer to form an interconnect structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.