Distributed history buffer flush and restore handling in a parallel slice design
US9747217B2 · kind B2 · utility
3Cited by
4References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2015 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Jun 1, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/62
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An approach is provided in which a computing system captures content included in a history buffer entry that corresponds to a flush ITAG. The computing system, in turn, uses an execution unit to transmit the content over a results bus to multiple registers and restore at least one of the registers accordingly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.