Dynamically modifying a power/performance tradeoff based on a processor utilization
US9760409B2 · kind B2 · utility
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35References
20Claims
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Key dates
| Filing date | May 24, 2016 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | May 24, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention includes a multicore processor having a power controller with logic to dynamically switch a power management policy from a power biased policy to a performance biased policy when a utilization of the processor exceeds a threshold level. Thus at low utilizations, reduced power consumption can be realized, while at higher utilizations, greater performance can be realized. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.