Ion beam etching utilizing cryogenic wafer temperatures
US9779955B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2016 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Apr 17, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperature via a cooled substrate support during particular processing steps. The cooled substrate support may have beneficial impacts in terms of reducing the degree of diffusion-related damage in a resulting device. Further, the use of a non-cooled substrate support during certain other processing steps can likewise have beneficial impacts in terms of reducing diffusion-related damage, depending on the particular step. In some implementations, the cooled substrate support may be used in a process to preferentially deposit a material (in some cases a reactant) on certain portions of the substrate. The disclosed embodiments may be used to achieve high quality anisotropic etching results.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.