Fabrication method of a stack of electronic devices
US9779982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2016 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Dec 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This method includes the following steps: a) providing a first structure successively including a substrate, an electronic device, a dielectric layer, and a first semiconductor layer; b) providing a second structure successively including a substrate, an active layer, a dielectric layer, and a second semiconductor layer, the active layer being designed to form an electronic device; c) bonding the first and second structures by direct bonding between the first and second semiconductor layers so as to form a bonding interface; d) removing the substrate of the second structure so as to expose the active layer; e) introducing dopants into the first and second semiconductor layers so as to form a ground plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.