Lithography process on high topology features
US9791775B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2016 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Mar 11, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/32
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method includes forming a first photo resist layer over a base structure and a target feature over the base structure, performing an un-patterned exposure on the first photo resist layer, and developing the first photo resist layer. After the step of developing, a corner portion of the first photo resist layer remains at a corner between a top surface of the base structure and an edge of the target feature. A second photo resist layer is formed over the target feature, the base structure, and the corner portion of the first photo resist layer. The second photo resist layer is exposed using a patterned lithography mask. The second photo resist layer is patterned to form a patterned photo resist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.