Wang-Pen Mo
15Patents
3h-index
19Co-inventors
49Inventor score
Filing activity: Nov 29, 2011 → Mar 11, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9028915B2 | Method of forming a photoresist layer | Physics | 104 | Active |
| US9875892B2 | Method of forming a photoresist layer | Physics | 57 | Active |
| US8940574B2 | Metal grid in backside illumination image sensor chips and methods for forming the same | Electricity | 4 | Active |
| US9349662B2 | Test structure placement on a semiconductor wafer | Electricity | 3 | Active |
| US9153620B2 | Method of fabricating a metal grid for semiconductor device | Electricity | 2 | Active |
| US9372406B2 | Film portion at wafer edge | Electricity | 1 | Active |
| US9651869B2 | Film portion at wafer edge | Electricity | 1 | Active |
| US9285677B2 | Lithography process on high topology features | Physics | 1 | Active |
| US8623229B2 | Manufacturing techniques to limit damage on workpiece with varying topographies | Electricity | 0 | Active |
| US8759225B2 | Method to form a CMOS image sensor | Electricity | 0 | Active |
| US8883403B2 | Method of semiconductor integrated circuit fabrication | Electricity | 0 | Active |
| US8771534B2 | Manufacturing techniques for workpieces with varying topographies | Electricity | 0 | Active |
| US9360755B2 | Thickening phase for spin coating process | Performing Operations; Transporting | 0 | Active |
| US8692296B2 | Semiconductor devices and manufacturing methods thereof | Electricity | 0 | Active |
| US9791775B2 | Lithography process on high topology features | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.