Multiple data prefetchers that defer to one another based on prefetch effectiveness by memory access type
US9817764B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2014 |
| Grant date | Nov 14, 2017 |
| Priority date | — |
| Expiry date | Feb 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a first prefetcher that prefetches data in response to memory accesses and a second prefetcher that prefetches data in response to memory accesses. Each of the memory accesses has an associated memory access type (MAT) of a plurality of predetermined MATs. The processor also includes a table that holds first scores that indicate effectiveness of the first prefetcher to prefetch data with respect to the plurality of predetermined MATs and second scores that indicate effectiveness of the second prefetcher to prefetch data with respect to the plurality of predetermined MATs. The first and second prefetchers selectively defer to one another with respect to data prefetches based on their relative scores in the table and the associated MATs of the memory accesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.