Write redirect
US9830108B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2015 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Jun 13, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device includes a memory (including a single level cell (SLC) memory portion and a multilevel cell (MLC) memory portion), a plurality of data latches, and routing circuitry coupled to the plurality of data latches. The routing circuitry is configured to cause write data, received from a controller, to be stored at a data latch of the plurality of data latches. The routing circuitry is further configured to cause the write data to be copied from the data latch to a particular portion of the memory based on receiving a program mode command after the write data is stored at the data latch, where the program mode command indicates the particular portion as one of the SLC memory portion or the MLC memory portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.