FETS and methods of forming FETs
US9831116B2 · kind B2 · utility
17Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2016 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Jan 20, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.