Inventor · Kaohsiung, TW

Chien-Chang Su

48Patents
8h-index
59Co-inventors
78Inventor score

Filing activity: Aug 7, 2003 → Jun 28, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US8652894B2 Method for fabricating a FinFET device Electricity 388 Active
US8362575B2 Controlling the shape of source/drain regions in FinFETs Electricity 233 Active
US8310013B2 Method of fabricating a FinFET device Electricity 74 Active
US8263451B2 Epitaxy profile engineering for FinFETs Electricity 72 Active
US9831116B2 FETS and methods of forming FETs Electricity 17 Active
US8975144B2 Controlling the shape of source/drain regions in FinFETs Electricity 13 Active
US8557692B2 FinFET LDD and source drain implant technique Electricity 11 Active
US8344447B2 Silicon layer for stopping dislocation propagation Electricity 9 Active
US8906789B2 Asymmetric cyclic desposition etch epitaxy Emerging Cross-Sectional Technologies 7 Active
US9117905B2 Method for incorporating impurity element in EPI silicon process Electricity 7 Active
US8853039B2 Defect reduction for formation of epitaxial layer in source and drain regions Electricity 7 Active
US8846461B2 Silicon layer for stopping dislocation propagation Electricity 6 Active
US9666691B2 Epitaxy profile engineering for FinFETs Electricity 6 Active
US9515187B2 Controlling the shape of source/drain regions in FinFETs Electricity 6 Active
US8778767B2 Integrated circuits and fabrication methods thereof Electricity 5 Active
US9117843B2 Device with engineered epitaxial region and methods of making same Electricity 3 Active
US8487354B2 Method for improving selectivity of epi process Electricity 3 Active
US9601626B2 Semiconductor device including fin structure with two channel layers and manufacturing method thereof Electricity 3 Active
US11004724B2 FETS and methods of forming FETS Electricity 3 Active
US7596655B2 Flash storage system with data storage security Physics 3 Active
US9379208B2 Integrated circuits and methods of forming integrated circuits Electricity 2 Active
US9412870B2 Device with engineered epitaxial region and methods of making same Electricity 2 Active
US9786780B2 Integrated circuits having source/drain structure Electricity 2 Active
US11854901B2 Semiconductor method and device Electricity 1 Active
US11728208B2 FETS and methods of forming FETS Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.