Multiple breakdown point low resistance anti-fuse structure
US9831254B1 · kind B1 · utility
4Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2016 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Sep 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An anti-fuse structure is provided that contains multiple breakdown points which result in low resistance after the anti-fuse structure is blown. The anti-fuse structure is provided using a method that is compatible with existing FinFET device processing flows without requiring any additional processing steps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.