Three-dimensional NAND device containing support pedestal structures for a buried source line and method of making the same
US9831266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2016 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Aug 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional memory device includes an alternating stack of electrically conductive layers and insulating layers located over a substrate, an array of memory stack structures. An alternating sequence of support pedestal structures and conductive rail structures extending along a same horizontal direction are provided between the substrate and the alternating stack. Each memory stack structure straddles a vertical interface between a conductive rail structure and a support pedestal structure. A semiconductor channel in each memory stack structure contacts a respective conductive rail structure, and is electrically isolated from an adjacent support pedestal structure by a portion of a memory film. The conductive rail structures can function as source regions of memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.