Methods and systems for enabling concurrent editing of electronic circuit layouts
US9842183B1 · kind B1 · utility
7Cited by
15References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2015 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Jan 13, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems of an electronic circuit design system described herein provide a new layout editor tool to make edits in an electronic circuit layout. A plurality of partitions is created in the electronic circuit layout. The new layout editor tool enables multiple electronic circuit designers to edit a different partition of the plurality of partitions of the same electronic circuit layout at the same time and save the edited partition locally.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.