Compact, low power advanced encryption standard circuit
US9843441B2 · kind B2 · utility
3Cited by
3References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2013 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Aug 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/24
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments of an invention for a compact, low power Advanced Encryption Standard circuit are disclosed. In one embodiment, an apparatus includes an encryption unit having a substitution box and an accumulator. The substitution box is to perform a substitution operation on one byte per clock cycle. The accumulator is to accumulate four bytes and perform a mix-column operation in four clock cycles. The encryption unit is implemented using optimum Galois Field polynomial arithmetic for minimum area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.