Recessed field plate transistor structures

US9847411B2 · kind B2 · utility

Assignee

• Cree, Inc. · US

Inventors

• Saptharishi Sriram · Cary, US
• Terry Alcorn · Cary, US
• Fabian Radulescu · Chapel Hill, US
• Scott Sheppard · Chapel Hill, US

Key dates

• Filing date: Jun 27, 2013
• Grant date: Dec 19, 2017
• Expiry date: Jun 27, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8503

Abstract

A transistor device including a field plate is described. One embodiment of such a device includes a field plate separated from a semiconductor layer by a thin spacer layer. In one embodiment, the thickness of spacer layer separating the field plate from the semiconductor layers is less than the thickness of spacer layer separating the field plate from the gate. In another embodiment, the non-zero distance separating the field plate from the semiconductor layers is about 1500 Å or less. Devices according to the present invention can show capacitances which are less drain bias dependent, resulting in improved linearity.