Single platform, multiple cycle spacer deposition and etch
US9852916B2 · kind B2 · utility
6Cited by
16References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2016 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Jun 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67742
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A first portion of a multiple cycle spacer is formed on a sidewall of a patterned feature over a substrate. A spacer layer is deposited on the first portion using a first plasma process. The spacer layer is etched to form a second portion of the multiple cycle spacer on the first portion using a second plasma process. A cycle comprising depositing and etching of the spacer layer is continuously repeated until the multiple cycle spacer is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.