Mask etch for patterning
US9852923B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2015 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Apr 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hard mask layer is deposited on a feature layer over a substrate. The hard mask layer comprises an organic mask layer. An opening in the organic mask layer is formed using a first gas comprising a halogen element at a first temperature greater than a room temperature to expose a portion of the feature layer. In one embodiment, a gas comprising a halogen element is supplied to a chamber. An organic mask layer on an insulating layer over a substrate is etched using the halogen element at a first temperature to form an opening to expose a portion of the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.