Patent · US Active

Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material

US9853043B2 · kind B2 · utility

39Cited by
27References
17Claims
0Family size

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Key dates

Filing dateAug 25, 2015
Grant dateDec 26, 2017
Priority date
Expiry dateAug 25, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/689
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of forming a three-dimensional memory device, includes forming a lower stack structure of insulating and first sacrificial material layers over a substrate, forming first memory openings through the lower stack structure and filling the first memory openings with a sacrificial fill material, replacing the first sacrificial material layers with first electrically conductive layers, forming an upper stack structure of insulating and second sacrificial material layers over the lower stack structure after replacing the first sacrificial material layers, forming second memory openings through the upper stack structure in areas overlying the first memory openings, replacing the second sacrificial material layers with second electrically conductive layers, removing the sacrificial fill material from the first memory openings underneath the second memory openings to form inter-stack memory openings after replacing the second sacrificial material layers, and forming memory stack structures within the inter-stack memory openings.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.