Constraint-driven pin optimization for hierarchical design convergence

US9858377B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Christopher J. Berry · Hudson, US
• Randall J. Darden · Hollister, US
• Adam R. Jatkowski · Wyoming, US
• Joseph J. Palumbo · Poughkeepsie, US
• Shyam Ramji · Lagrangeville, US
• Sourav Saha · Sherghati, IN
• Timothy A. Schell · Cary, US
• Eddy St. Juste · Bridgeport, US

Key dates

• Filing date: Nov 10, 2015
• Grant date: Jan 2, 2018
• Expiry date: Nov 10, 2035

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2111/04
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A computer-implemented method of performing physical synthesis in a chip design process using hierarchical wire-pin co-optimization, a system, and a computer program product are described. Aspects include providing an indication of candidate pins among a plurality of pins of a plurality of macros that may be moved, and providing constraints on a range of movement of one or more of the plurality of pins. Aspects also include performing macro-level physical synthesis at each of the plurality of macros based on the candidate pins and the constraints to generate pin locations and timing results.