Vertical field effect transistor having U-shaped top spacer

US9859166B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Kangguo Cheng · Schenectady, US
• Xin Miao · Guilderland, US
• Wenyu Xu · Albany, US
• Chen Zhang · Guilderland, US

Key dates

• Filing date: Jan 24, 2017
• Grant date: Jan 2, 2018
• Expiry date: Jan 24, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/83

Abstract

A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins over a source/drain region, forming a first spacer within troughs defined by the plurality of fins and depositing a high-k dielectric layer, a work function material layer, and a conducting layer. The method further includes etching the high-k dielectric layer, the work function material layer, and the conducting layer to form recesses between the plurality of fins, depositing a liner dielectric, and etching portions of the liner dielectric to form a plurality of second spacers having a U-shaped configuration. The method further includes forming an epitaxial layer over the plurality of fins such that a gap region is defined between the plurality of second spacers and the epitaxial layer.