Patent · US Active

Single-electron transistor with wrap-around gate

US9859409B2 · kind B2 · utility

27Cited by
8References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 28, 2016
Grant dateJan 2, 2018
Priority date
Expiry dateApr 28, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/512

Abstract

Transistors and methods of forming the same include forming a fin having an active layer between two sacrificial layers. A dummy gate is formed over the fin. Spacers are formed around the dummy gate. The dummy gate is etched away to form a gap over the fin. Material from the two sacrificial layers is etched away in the gap. A gate stack is formed around the active layer in the gap. Source and drain regions are formed in contact with the active layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.