Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units
US9865525B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2014 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Jul 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a carrier with a die attach area. A semiconductor die is mounted to the die attach area with a back surface opposite the carrier. A modular interconnect unit is mounted over the carrier and around or in a peripheral region around the semiconductor die such that the modular interconnect unit is offset from the back surface of the semiconductor die. An encapsulant is deposited over the carrier, semiconductor die, and modular interconnect unit. A first portion of the encapsulant is removed to expose the semiconductor die and a second portion is removed to expose the modular interconnect unit. The carrier is removed. An interconnect structure is formed over the semiconductor die and modular interconnect unit. The modular interconnect unit includes a vertical interconnect structures or bumps through the semiconductor device. The modular interconnect unit forms part of an interlocking pattern around the semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.