Heterogeneous pocket for tunneling field effect transistors (TFETs)
US9871106B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2013 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Dec 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/824
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure described herein comprise a tunneling field effect transistor (TFET) having a drain region, a source region having a conductivity type opposite of the drain region, a channel region disposed between the source region and the drain region, a gate disposed over the channel region, and a heterogeneous pocket disposed near a junction of the source region and the channel region. The heterogeneous pocket comprises a semiconductor material different than the channel region, and comprises a tunneling barrier less than the bandgap in the channel region and forming a quantum well in the channel region to in crease a current through the TFET transistor when a voltage applied to the gate is above a threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.