Method of forming a semiconductor device structure using differing spacer widths and the resulting semiconductor device structure
US9876111B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2016 |
| Grant date | Jan 23, 2018 |
| Priority date | — |
| Expiry date | Apr 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
Abstract
A method of forming a semiconductor device structure is disclosed including providing a first active region and a second active region in an upper surface portion of a substrate, the first and second active regions being laterally separated by at least one isolation structure, forming a first gate structure comprising a first gate dielectric and a first gate electrode material over the first active region, and a second gate structure comprising a second gate dielectric and a second gate electrode material over the second active region, wherein a thickness of the second gate dielectric is greater than the thickness of the first gate dielectric, and forming a first sidewall spacer structure to the first gate structure and a second sidewall spacer structure to the second gate structure, wherein a lateral thickness of the second sidewall spacer structure is greater than a lateral thickness of the first sidewall spacer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.