High mobility strained channels for fin-based transistors

US9893149B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Stephen M. Cea · Hillsboro, US
• Anand S. Murthy · Beaverton, US
• Glenn A. Glass · Portland, US
• Daniel B. Aubertine · North Plains, US
• Tahir Ghani · Portland, US
• Jack T. Kavalieros · Portland, US
• Roza Kotlyar · Portland, US

Key dates

• Filing date: Nov 9, 2015
• Grant date: Feb 13, 2018
• Expiry date: Nov 9, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/792
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Techniques are disclosed for incorporating high mobility strained channels into fin-based transistors (e.g., FinFETs such as double-gate, trigate, etc), wherein a stress material is cladded onto the channel area of the fin. In one example embodiment, silicon germanium (SiGe) is cladded onto silicon fins to provide a desired stress, although other fin and cladding materials can be used. The techniques are compatible with typical process flows, and the cladding deposition can occur at a plurality of locations within the process flow. In some cases, the built-in stress from the cladding layer may be enhanced with a source/drain stressor that compresses both the fin and cladding layers in the channel. In some cases, an optional capping layer can be provided to improve the gate dielectric/semiconductor interface. In one such embodiment, silicon is provided over a SiGe cladding layer to improve the gate dielectric/semiconductor interface.