Skip-vias bypassing a metallization level at minimum pitch
US9911651B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2016 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Oct 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53238
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a skip-via, including, forming a first dielectric layer on a first metallization layer, forming a second metallization layer on the first dielectric layer and a second dielectric layer on the second metallization layer, removing a section of the second dielectric layer to form a via to the second metallization layer, removing a portion of the second metallization layer to form an aperture, and removing an additional portion of the second metallization layer to form an exclusion zone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.