Methods of modulating the morphology of epitaxial semiconductor material
US9953873B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2016 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | May 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Chip structures and fabrication methods for forming such chip structures. A first device structure has a structural feature comprised of a first dielectric material and a second device structure has a structural feature comprised of a second dielectric material. A semiconductor layer has a first section adjacent to the structural feature of the first device structure and a second section adjacent to the structural feature of the second device structure. The first section of the semiconductor layer has a popped relationship relative to the structural feature comprised of the first dielectric material. The second section of the semiconductor layer includes a portion that has a pinned relationship relative to a portion of the structural feature comprised of the second dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.