Inventor · Danbury, CT, US

Viorel Ontalus

61Patents
7h-index
67Co-inventors
71Inventor score

Filing activity: Jul 28, 2006 → Nov 21, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US8278164B2 Semiconductor structures and methods of manufacturing the same Electricity 17 Active
US8361847B2 Stressed channel FET with source/drain buffers Electricity 14 Active
US8035141B2 Bi-layer nFET embedded stressor element and integration to enhance drive current Emerging Cross-Sectional Technologies 13 Active
US9059292B2 Source and drain doping profile control employing carbon-doped semiconductor material Electricity 11 Active
US8492234B2 Field effect transistor device Electricity 10 Active
US8551845B2 Structure and method for increasing strain in a device Electricity 10 Active
US8940595B2 Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels Electricity 8 Active
US7502658B1 Methods of fabricating optimization involving process sequence analysis Emerging Cross-Sectional Technologies 6 Active
US7687338B2 Method of reducing embedded SiGe loss in semiconductor device manufacturing Emerging Cross-Sectional Technologies 6 Active
US8394712B2 Cavity-free interface between extension regions and embedded silicon-carbon alloy source/drain regions Electricity 6 Active
US8193065B2 Asymmetric source and drain stressor regions Electricity 6 Active
US7786025B1 Activating dopants using multiple consecutive millisecond-range anneals Electricity 6 Active
US8343825B2 Reducing dislocation formation in semiconductor devices through targeted carbon implantation Electricity 5 Active
US9287399B2 Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels Electricity 4 Active
US8236709B2 Method of fabricating a device using low temperature anneal processes, a device and design structure Electricity 4 Active
US7337033B1 Data mining to detect performance quality of tools used repetitively in manufacturing Emerging Cross-Sectional Technologies 4 Active
US8921939B2 Stressed channel FET with source/drain buffers Electricity 3 Active
US8741725B2 Butted SOI junction isolation structures and devices and method of fabrication Electricity 3 Active
US8546219B2 Reducing performance variation of narrow channel devices Electricity 3 Active
US7855110B2 Field effect transistor and method of fabricating same Electricity 3 Active
US9673295B2 Contact resistance optimization via EPI growth engineering Electricity 3 Active
US8541814B2 Minimizing leakage current and junction capacitance in CMOS transistors by utilizing dielectric spacers Electricity 2 Active
US8618617B2 Field effect transistor device Electricity 2 Active
US8338279B2 Reduced pattern loading for doped epitaxial process and semiconductor structure Electricity 2 Active
US8604564B2 Semiconductor structures and methods of manufacturing the same Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.