Silicon-carbide transistor device with a shielded gate

US9960230B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Romain Esteve · Munich, DE
• Dethard Peters · Edenkoben, DE
• Wolfgang Bergner · Waldbüttelbrunn, DE
• Ralf Siemieniec · Villach, AT
• Thomas Aichinger · Faak am See, AT
• Daniel Kueck · Villach, AT

Key dates

• Filing date: Jan 6, 2017
• Grant date: May 1, 2018
• Expiry date: Jan 6, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/514
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.