Semiconductor substrate and semiconductor package structure
US9984989B2 · kind B2 · utility
1Cited by
12References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2015 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Sep 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor substrate includes an insulating layer, a first conductive patterned layer disposed adjacent to a first surface of the insulating layer, and conductive bumps disposed on the first conductive patterned layer. Each conductive bump has a first dimension along a first direction and a second dimension along a second direction perpendicular to the first direction, and the first dimension is greater than the second dimension. A semiconductor package structure includes the semiconductor substrate, at least one die electrically connected to the conductive bumps, and a molding compound encapsulating the conductive bumps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.