Power trench MOSFET with improved unclamped inductive switching (UIS) performance and preparation method thereof
US9997593B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2017 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Jul 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A trench type power semiconductor device with improved breakdown voltage and UIS performance and a method for preparation the device are disclosed. The trench type power semiconductor device includes a first contact hole formed in a mesa in the active area and a second contact hole formed in a mesa in an active to termination intermediate area, where the first contact hole is deeper and wider than the second contact hole. The method comprises the steps of providing a semiconductor substrate, etching an epitaxial layer, depositing a conductive material, depositing an insulation passivation layer and etching through the insulation passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.