Optimum Semiconductor Technologies Inc.
23Patents
23Active
23Granted
48Portfolio score
Filing activity: Nov 12, 2014 → Sep 18, 2019
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10339095B2 | Vector processor configured to operate on variable length vectors using digital signal processing instructions | Physics | 9 | Active |
| US9959246B2 | Vector processor configured to operate on variable length vectors using implicitly typed instructions | Physics | 5 | Active |
| US10169039B2 | Computer processor that implements pre-translation of virtual addresses | Physics | 5 | Active |
| US9910824B2 | Vector processor configured to operate on variable length vectors using instructions to combine and split vectors | Physics | 3 | Active |
| US9766894B2 | Method and apparatus for enabling a processor to generate pipeline control signals | Physics | 2 | Active |
| US9558000B2 | Multithreading using an ordered list of hardware contexts | Physics | 2 | Active |
| US10908909B2 | Processor with mode support | Physics | 2 | Active |
| US10719451B2 | Variable translation-lookaside buffer (TLB) indexing | Physics | 1 | Active |
| US10824586B2 | Vector processor configured to operate on variable length vectors using one or more complex arithmetic instructions | Physics | 1 | Active |
| US9792116B2 | Computer processor that implements pre-translation of virtual addresses with target registers | Physics | 1 | Active |
| US11650817B2 | System and method to implement masked vector instructions | Physics | 1 | Active |
| US11544214B2 | Monolithic vector processor configured to operate on variable length vectors using a vector length register | Physics | 1 | Active |
| US10381725B2 | Monolithic dual band antenna | Electricity | 0 | Active |
| US10733140B2 | Vector processor configured to operate on variable length vectors using instructions that change element widths | Physics | 0 | Active |
| US11144815B2 | System and architecture of neural network accelerator | Physics | 0 | Active |
| US9948859B2 | Video image alignment for video stabilization | Electricity | 0 | Active |
| US10922267B2 | Vector processor to operate on variable length vectors using graphics processing instructions | Physics | 0 | Active |
| US10514915B2 | Computer processor with address register file | Physics | 0 | Active |
| US9940129B2 | Computer processor with register direct branches and employing an instruction preload structure | Physics | 0 | Active |
| US10846259B2 | Vector processor to operate on variable length vectors with out-of-order execution | Physics | 0 | Active |
| US11157407B2 | Implementing atomic primitives using cache line locking | Physics | 0 | Active |
| US10339094B2 | Vector processor configured to operate on variable length vectors with asymmetric multi-threading | Physics | 0 | Active |
| US9766895B2 | Opportunity multithreading in a multithreaded processor with instruction chaining capability | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.