Abhishek Basak
32Patents
3h-index
49Co-inventors
55Inventor score
Filing activity: Nov 14, 2014 → May 22, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11144468B2 | Hardware based technique to prevent critical fine-grained cache side-channel attacks | Physics | 6 | Active |
| US9685958B2 | Defense against counterfeiting using antifuses | Electricity | 6 | Active |
| US10783089B2 | Securing data direct I/O for a secure accelerator interface | Physics | 4 | Active |
| US10761996B2 | Apparatus and method for secure memory access using trust domains | Physics | 3 | Active |
| US11188643B2 | Methods and apparatus for detecting a side channel attack using hardware performance counters | Physics | 2 | Active |
| US11455392B2 | Methods and apparatus of anomalous memory access pattern detection for translational lookaside buffers | Physics | 2 | Active |
| US11373013B2 | Technologies for filtering memory access transactions received from one or more I/O devices | Physics | 1 | Active |
| US11392506B2 | Apparatus and method for secure memory access using trust domains | Physics | 1 | Active |
| US10536264B2 | Efficient cryptographically secure control flow integrity protection | Physics | 1 | Active |
| US11755500B2 | Cryptographic computing with disaggregated memory | Physics | 1 | Active |
| US10025956B2 | Techniques to compress cryptographic metadata for memory encryption | Electricity | 1 | Active |
| US11599621B2 | Apparatuses, methods, and systems for verification of input-output memory management unit to device attachment | Physics | 0 | Active |
| US12210660B2 | Cryptographic computing with legacy peripheral devices | Physics | 0 | Active |
| US12189542B2 | Technologies for secure device configuration and management | Physics | 0 | Active |
| US11347839B2 | Techniques for control flow protection | Emerging Cross-Sectional Technologies | 0 | Active |
| US11494523B2 | Direct memory access mechanism | Physics | 0 | Active |
| US12314460B2 | Memory address bus protection for increased resilience against hardware replay attacks and memory access pattern leakage | Physics | 0 | Active |
| US10360374B2 | Techniques for control flow protection | Emerging Cross-Sectional Technologies | 0 | Active |
| US11625275B2 | Technologies for controlling memory access transactions received from one or more I/O devices | Electricity | 0 | Active |
| US11681533B2 | Restricted speculative execution mode to prevent observable side effects | Physics | 0 | Active |
| US11921645B2 | Securing data direct I/O for a secure accelerator interface | Physics | 0 | Active |
| US11416415B2 | Technologies for secure device configuration and management | Physics | 0 | Active |
| US12032486B2 | Transient side-channel aware architecture for cryptographic computing | Physics | 0 | Active |
| US10878134B2 | Technologies for controlling memory access transactions received from one or more I/O devices | Electricity | 0 | Active |
| US11481337B2 | Securing data direct I/O for a secure accelerator interface | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.