Inventor · Dublin, CA, US

Ajay Baranwal

11Patents
2h-index
8Co-inventors
39Inventor score

Filing activity: May 18, 2018 → Jan 30, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US10592634B1 Systems and methods for automatic handling of engineering design parameter violations Physics 8 Active
US11250199B1 Methods and systems for generating shape data for electronic designs Physics 2 Active
US11182929B2 Methods and systems for compressing shape data for electronic designs Physics 1 Active
US11847400B2 Methods and systems for generating shape data for electronic designs Physics 0 Active
US12287567B2 Method and system for reticle enhancement technology Physics 0 Active
US12288022B2 Methods and systems for generating shape data for electronic designs Physics 0 Active
US11921420B2 Method and system for reticle enhancement technology Physics 0 Active
US12045996B2 Methods and systems for registering images for electronic designs Physics 0 Active
US12340495B2 Method for computational metrology and inspection for patterns to be manufactured on a substrate Physics 0 Active
US11823423B2 Methods and systems for compressing shape data for electronic designs Physics 0 Active
US11264206B2 Methods and systems for forming a pattern on a surface using multi-beam charged particle beam lithography Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.