Charles Rosenstein
10Patents
4h-index
15Co-inventors
49Inventor score
Filing activity: Oct 31, 2006 → Jun 29, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7935568B2 | Wafer-level fabrication of lidded chips with electrodeposited dielectric coating | Electricity | 59 | Active |
| US7807508B2 | Wafer-level fabrication of lidded chips with electrodeposited dielectric coating | Electricity | 55 | Active |
| US7936062B2 | Wafer level chip packaging | Electricity | 54 | Active |
| US7791199B2 | Packaged semiconductor chips | Electricity | 43 | Active |
| US8653644B2 | Packaged semiconductor chips with array | Electricity | 3 | Active |
| US9548254B2 | Packaged semiconductor chips with array | Electricity | 1 | Active |
| US8053281B2 | Method of forming a wafer level package | Electricity | 1 | Active |
| US8704347B2 | Packaged semiconductor chips | Electricity | 0 | Active |
| US8569876B2 | Packaged semiconductor chips with array | Electricity | 0 | Active |
| US9070678B2 | Packaged semiconductor chips with array | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.