Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
US8103851B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2008 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Aug 11, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. An index portion of the virtual address is used to reference an entry in the translation table. If a format control field contained in the translation table entry is enabled, the table entry contains a frame address of a large block of data of at least 1M byte in size. The frame address is then combined with an offset portion of the virtual address to form the translated address of a small 4K byte block of data in main storage or memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.