Dynamic address translation with change record override
US8117417B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2008 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | Dec 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/109
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. A segment table entry obtained from a segment table contains a format control field. If the format control field is enabled, a segment-frame absolute address of a large block of data in main storage is obtained from the segment table entry. Each 4K byte block of data within the large block has an associated storage key. Store operations associated with the virtual address are performed to the desired block of data. If the change recording override field is disabled, the change bit of the storage key associated with the desired 4K byte block is set to 1. An indication is then provided that the desired 4K byte block has been modified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.