Daniel V. Rosa
23Patents
2h-index
17Co-inventors
50Inventor score
Filing activity: Jan 11, 2008 → Dec 10, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8312465B2 | Real-time CPU dispatcher affinity re-balancing | Physics | 8 | Active |
| US8510739B2 | Shared request grouping in a computing system | Physics | 3 | Active |
| US9417927B2 | Runtime capacity planning in a simultaneous multithreading (SMT) environment | Physics | 2 | Active |
| US10521351B2 | Temporarily suppressing processing of a restrained storage operand request | Physics | 2 | Active |
| US10621090B2 | Facility for extending exclusive hold of a cache line in private cache | Physics | 1 | Active |
| US9710184B2 | Servicing multiple counters based on a single access check | Physics | 1 | Active |
| US9436608B1 | Memory nest efficiency with cache demand generation | Physics | 1 | Active |
| US10956337B2 | Temporarily suppressing processing of a restrained storage operand request | Physics | 1 | Active |
| US10877866B2 | Diagnosing workload performance problems in computer servers | Physics | 0 | Active |
| US11366759B2 | Temporarily suppressing processing of a restrained storage operand request | Physics | 0 | Active |
| US11182409B2 | Data processing with tags | Physics | 0 | Active |
| US9760302B2 | Servicing multiple counters based on a single access check | Physics | 0 | Active |
| US10606639B2 | Dynamic workload bucket reassignment | Physics | 0 | Active |
| US10102004B2 | Hardware counters to track utilization in a multithreading computer system | Physics | 0 | Active |
| US10534557B2 | Servicing multiple counters based on a single access check | Physics | 0 | Active |
| US11165679B2 | Establishing consumed resource to consumer relationships in computer servers using micro-trend technology | Electricity | 0 | Active |
| US11194701B2 | Identifying software interaction defects using differential speed processors | Physics | 0 | Active |
| US10620995B2 | Dynamic workload bucket reassignment | Physics | 0 | Active |
| US9361159B2 | Runtime chargeback in a simultaneous multithreading (SMT) environment | Physics | 0 | Active |
| US9740618B2 | Memory nest efficiency with cache demand generation | Physics | 0 | Active |
| US11182269B2 | Proactive change verification | Physics | 0 | Active |
| US10303575B2 | Time-slice-instrumentation facility | Physics | 0 | Active |
| US10095523B2 | Hardware counters to track utilization in a multithreading computer system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.