Dror Markovich
14Patents
3h-index
22Co-inventors
52Inventor score
Filing activity: Dec 19, 2012 → Nov 1, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9361116B2 | Apparatus and method for low-latency invocation of accelerators | Physics | 10 | Active |
| US9417873B2 | Apparatus and method for a hybrid latency-throughput processor | Physics | 9 | Active |
| US10133577B2 | Vector mask driven clock gating for power efficiency of a processor | Emerging Cross-Sectional Technologies | 5 | Active |
| US10095521B2 | Apparatus and method for low-latency invocation of accelerators | Physics | 3 | Active |
| US11178570B2 | Apparatus, system and method of communication during a transmit opportunity (TXOP) | Electricity | 2 | Active |
| US10255077B2 | Apparatus and method for a hybrid latency-throughput processor | Physics | 2 | Active |
| US10140129B2 | Processing core having shared front end unit | Physics | 1 | Active |
| US11329706B2 | Communication scanning method and system | Emerging Cross-Sectional Technologies | 0 | Active |
| US10089113B2 | Apparatus and method for low-latency invocation of accelerators | Physics | 0 | Active |
| US10664284B2 | Apparatus and method for a hybrid latency-throughput processor | Physics | 0 | Active |
| US11743761B2 | Apparatus, system and method of communication during a transmit opportunity (TXOP) | Electricity | 0 | Active |
| US10083037B2 | Apparatus and method for low-latency invocation of accelerators | Physics | 0 | Active |
| US11671866B2 | Apparatus, system and method of communication during a transmit opportunity (TXOP) | General | 0 | Revoked |
| US9189398B2 | Apparatus and method for memory-mapped register caching | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.