Dwayne Burek
7Patents
6h-index
14Co-inventors
56Inventor score
Filing activity: Mar 26, 1992 → Jun 4, 2004
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5349587A | Multiple clock rate test apparatus for testing digital systems | Physics | 134 | Expired |
| US6510534B1 | Method and apparatus for testing high performance circuits | Physics | 45 | Expired |
| US7203873B1 | Asynchronous control of memory self test | Physics | 25 | Expired |
| US6615392B1 | Hierarchical design and test method and system, program product embodying the method and integrated circuit produced thereby | Physics | 25 | Expired |
| US6145105A | Method and apparatus for scan testing digital circuits | Physics | 22 | Expired |
| US6457161B1 | Method and program product for modeling circuits with latch based design | Physics | 11 | Expired |
| US6862717B2 | Method and program product for designing hierarchical circuit for quiescent current testing | Physics | 5 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.