Inventor · San Marcos, CA, US

Eric Fogleman

21Patents
6h-index
14Co-inventors
66Inventor score

Filing activity: Apr 25, 1997 → May 9, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US6577261B2 Method and apparatus for mismatched shaping of an oversampled converter Electricity 18 Expired
US8922415B2 Method and system for asynchronous successive approximation register (SAR) analog-to-digital converters (ADCs) Electricity 17 Active
US8611483B2 Multi-layer time-interleaved analog-to-digital convertor (ADC) Electricity 16 Active
US6771199B2 Method and apparatus for mismatched shaping of an oversampled converter Electricity 12 Expired
US6628218B2 Method and apparatus for mismatched shaping of an oversampled converter Electricity 11 Expired
US5983315A System and method for establishing priorities in transferring data in burst counts from a memory to a plurality of FIFO stages, each having a low, intermediate, and high region Physics 7 Expired
US6930626B2 Computer program product for mismatched shaping of an oversampled converter Electricity 6 Expired
US9124291B2 Method and system for asynchronous successive approximation analog-to-digital convertor (ADC) architecture Electricity 5 Active
US9136859B2 Method and system for asynchronous successive approximation register (SAR) analog-to-digital converters (ADCs) Electricity 5 Active
US8934590B2 Signal receiver with multi-level sampling Electricity 4 Active
US9413378B2 Method and system for asynchronous successive approximation register (SAR) analog-to-digital converters (ADCS) Electricity 4 Active
US9537503B2 Method and system for asynchronous successive approximation analog-to-digital convertor (ADC) architecture Electricity 1 Active
US10003347B2 Method and system for asynchronous successive approximation register (SAR) analog-to-digital converters (ADCs) Electricity 1 Active
US9800253B2 Method and system for asynchronous successive approximation register (SAR) analog-to-digital converters (ADCs) Electricity 1 Active
US9337859B2 Method and system for asynchronous successive approximation analog-to-digital convertor (ADC) architecture Electricity 1 Active
US9991847B2 Method and apparatus for broadband data conversion Electricity 0 Active
US10243576B2 Method and system for asynchronous successive approximation register (SAR) analog-to-digital converters (ADCS) Electricity 0 Active
US8816762B2 Area-optimized analog filter with bandwidth control by a quantized scaling function Electricity 0 Active
US10256773B2 Method and apparatus for broadband data conversion Electricity 0 Active
US9985777B2 Multi-layer time-interleaved analog-to-digital convertor (ADC) Electricity 0 Active
US9559835B2 Signal receiver with multi-level sampling Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.