Inventor · South Burlington, VT, US

John E. Barwin

7Patents
3h-index
14Co-inventors
50Inventor score

Filing activity: Jan 15, 2004 → Jan 22, 2014

Most-cited inventions

PatentTitleAreaCited byStatus
US8656325B2 Integrated circuit design method and system Physics 3 Active
US7403061B2 Method of improving fuse state detection and yield in semiconductor applications Electricity 3 Expired
US8560990B2 Method of managing electro migration in logic designs and design structure thereof Emerging Cross-Sectional Technologies 3 Active
US7057924B2 Precharging the write path of an MRAM device for fast write operation Physics 2 Expired
US8938701B2 Method of managing electro migration in logic designs and design structure thereof Emerging Cross-Sectional Technologies 2 Active
US7492199B2 Fully synchronous DLL with architected update window Electricity 2 Active
US9104832B1 Identifying and mitigating electromigration failures in signal nets of an integrated circuit chip design Physics 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.