Inventor · Westford, MA, US

John R. Feehrer

27Patents
6h-index
53Co-inventors
72Inventor score

Filing activity: Mar 26, 1999 → Oct 20, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US6405322B1 System and method for recovery from address errors Physics 21 Expired
US9026705B2 Interrupt processing unit for preventing interrupt loss Physics 18 Active
US9507740B2 Aggregation of interrupts using event queues Physics 17 Active
US8631181B2 Validating message-signaled interrupts by tracking interrupt vectors assigned to devices Physics 15 Active
US6601165B2 Apparatus and method for implementing fault resilient booting in a multi-processor system by using a flush command to control resetting of the processors and isolating failed processors Physics 13 Expired
US7689751B2 PCI-express system Physics 9 Active
US6381663B1 Mechanism for implementing bus locking with a mixed architecture Physics 6 Expired
US9280290B2 Method for steering DMA write requests to cache memory Physics 5 Active
US8090801B1 Methods and apparatus for performing remote access commands between nodes Physics 5 Active
US6826671B2 Method and device for a context-based memory management system Physics 3 Expired
US11182309B2 Techniques for an efficient fabric attached memory Physics 3 Active
US10296356B2 Implementation of reset functions in an SoC virtualized device Physics 2 Active
US10817456B2 Separation of control and data plane functions in SoC virtualized I/O device Physics 2 Active
US10078543B2 Correctable error filtering for input/output subsystem Physics 2 Active
US8151145B2 Flow control timeout mechanism to detect PCI-express forward progress blockage Physics 2 Active
US10552340B2 Input/output direct memory access during live memory relocation Emerging Cross-Sectional Technologies 1 Active
US9952989B2 Aggregation of interrupts using event queues Physics 1 Active
US10963295B2 Hardware accelerated data processing operations for storage data Physics 1 Active
US10853303B2 Separation of control and data plane functions in SoC virtualized I/O device Physics 0 Active
US10860520B2 Integration of a virtualized input/output device in a computer system Physics 0 Active
US10983921B2 Input/output direct memory access during live memory relocation Emerging Cross-Sectional Technologies 0 Active
US8839268B2 Method and system of preventing silent data corruption Physics 0 Active
US9582346B2 Selecting I/O interrupt target for multi-core server systems Physics 0 Active
US9396142B2 Virtualizing input/output interrupts Physics 0 Active
US10489317B2 Aggregation of interrupts using event queues Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.